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+From fdfad81006c2c964781b616f0a75578507be809c Mon Sep 17 00:00:00 2001
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+From: Michael Jeanson <mjeanson@efficios.com>
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+Date: Wed, 21 Mar 2018 17:38:41 -0400
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+Subject: [PATCH] Add support for the RISC-V architecture
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+
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+Tested in QEMU 2.12.0-rc0, requires --disable-compiler-tls to go
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+through the benchmarks reliably.
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+
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+Signed-off-by: Michael Jeanson <mjeanson@efficios.com>
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+Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
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+Upstream-Status: Backport
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+---
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+ configure.ac | 1 +
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+ include/Makefile.am | 2 ++
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+ include/urcu/arch/riscv.h | 49 ++++++++++++++++++++++++++++++++++++++++++++
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+ include/urcu/uatomic/riscv.h | 44 +++++++++++++++++++++++++++++++++++++++
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+ 4 files changed, 96 insertions(+)
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+ create mode 100644 include/urcu/arch/riscv.h
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+ create mode 100644 include/urcu/uatomic/riscv.h
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+
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+diff --git a/configure.ac b/configure.ac
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+index d0b4a9ac..9145081a 100644
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+--- a/configure.ac
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++++ b/configure.ac
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+@@ -151,6 +151,7 @@ AS_CASE([$host_cpu],
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+ [tile*], [ARCHTYPE="tile"],
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+ [hppa*], [ARCHTYPE="hppa"],
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+ [m68k], [ARCHTYPE="m68k"],
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++ [riscv*], [ARCHTYPE="riscv"],
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+ [ARCHTYPE="unknown"]
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+ )
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+
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+diff --git a/include/Makefile.am b/include/Makefile.am
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+index dcdf304b..36667b43 100644
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+--- a/include/Makefile.am
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++++ b/include/Makefile.am
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+@@ -27,6 +27,7 @@ EXTRA_DIST = urcu/arch/aarch64.h \
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+ urcu/arch/mips.h \
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+ urcu/arch/nios2.h \
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+ urcu/arch/ppc.h \
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++ urcu/arch/riscv.h \
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+ urcu/arch/s390.h \
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+ urcu/arch/sparc64.h \
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+ urcu/arch/tile.h \
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+@@ -43,6 +44,7 @@ EXTRA_DIST = urcu/arch/aarch64.h \
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+ urcu/uatomic/mips.h \
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+ urcu/uatomic/nios2.h \
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+ urcu/uatomic/ppc.h \
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++ urcu/uatomic/riscv.h \
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+ urcu/uatomic/s390.h \
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+ urcu/uatomic/sparc64.h \
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+ urcu/uatomic/tile.h \
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+diff --git a/include/urcu/arch/riscv.h b/include/urcu/arch/riscv.h
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+new file mode 100644
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+index 00000000..1fd7d62b
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+--- /dev/null
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++++ b/include/urcu/arch/riscv.h
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+@@ -0,0 +1,49 @@
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++#ifndef _URCU_ARCH_RISCV_H
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++#define _URCU_ARCH_RISCV_H
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++
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++/*
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++ * arch/riscv.h: definitions for the RISC-V architecture
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++ *
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++ * Copyright (c) 2018 Michael Jeanson <mjeanson@efficios.com>
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++ *
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++ * This library is free software; you can redistribute it and/or
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++ * modify it under the terms of the GNU Lesser General Public
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++ * License as published by the Free Software Foundation; either
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++ * version 2.1 of the License, or (at your option) any later version.
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++ *
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++ * This library is distributed in the hope that it will be useful,
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++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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++ * Lesser General Public License for more details.
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++ *
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++ * You should have received a copy of the GNU Lesser General Public
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++ * License along with this library; if not, write to the Free Software
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++ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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++ */
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++
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++#include <urcu/compiler.h>
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++#include <urcu/config.h>
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++#include <urcu/syscall-compat.h>
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++
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++#ifdef __cplusplus
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++extern "C" {
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++#endif
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++
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++#include <stdlib.h>
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++#include <sys/time.h>
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++
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++/*
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++ * On Linux, define the membarrier system call number if not yet available in
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++ * the system headers.
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++ */
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++#if (defined(__linux__) && !defined(__NR_membarrier))
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++#define __NR_membarrier 283
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++#endif
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++
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++#ifdef __cplusplus
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++}
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++#endif
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++
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++#include <urcu/arch/generic.h>
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++
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++#endif /* _URCU_ARCH_RISCV_H */
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+diff --git a/include/urcu/uatomic/riscv.h b/include/urcu/uatomic/riscv.h
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+new file mode 100644
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+index 00000000..a6700e17
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+--- /dev/null
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++++ b/include/urcu/uatomic/riscv.h
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+@@ -0,0 +1,44 @@
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++/*
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++ * Atomic exchange operations for the RISC-V architecture. Let GCC do it.
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++ *
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++ * Copyright (c) 2018 Michael Jeanson <mjeanson@efficios.com>
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++ *
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++ * Permission is hereby granted, free of charge, to any person obtaining a copy
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++ * of this software and associated documentation files (the "Software"), to
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++ * deal in the Software without restriction, including without limitation the
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++ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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++ * sell copies of the Software, and to permit persons to whom the Software is
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++ * furnished to do so, subject to the following conditions:
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++ *
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++ * The above copyright notice and this permission notice shall be included in
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++ * all copies or substantial portions of the Software.
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++ *
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++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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++ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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++ * IN THE SOFTWARE.
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++ */
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++
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++#ifndef _URCU_ARCH_UATOMIC_RISCV_H
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++#define _URCU_ARCH_UATOMIC_RISCV_H
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++
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++#include <urcu/compiler.h>
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++#include <urcu/system.h>
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++
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++#ifdef __cplusplus
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++extern "C" {
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++#endif
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++
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++#define UATOMIC_HAS_ATOMIC_BYTE
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++#define UATOMIC_HAS_ATOMIC_SHORT
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++
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++#ifdef __cplusplus
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++}
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++#endif
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++
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++#include <urcu/uatomic/generic.h>
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++
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++#endif /* _URCU_ARCH_UATOMIC_RISCV_H */
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Alistair Francis